Index
A
AArch64 (see ARM64)
ABA problem, #
aborting the process, #
AcqRel, #
- (see also release and acquire memory ordering)
acquire memory ordering (see release and acquire memory ordering)
add instruction (ARM), #
add instruction (x86), #
address-based waiting (Windows), #
- (see also futex)
air, out of thin, #
alignment, #
allocating IDs (see ID allocation)
AMD processors, #
and instruction (x86), #
Arc, #
arguments, consuming, #
ARM64 (processor architecture), #
ARM64 instructions
- add, #
- ARMv8.1 atomic instructions, #, #
- b.ne (branch if not equal), #
- cbnz (compare and branch on nonzero), #
- clrex (clear exclusive), #
- cmp (compare), #
- dmb (data memory barrier), #
- ldar (load-acquire register), #
- ldaxr (load-acquire exclusive register), #
- ldr (load register), #
- ldxr (load exclusive register), #
- load-linked and store-conditional instructions, #
- mov (move), #
- overview, #
- ret (return), #
- stlr (store-release register), #
- stlxr (store-release exclusive register), #
- str (store register), #
- stxr (store exclusive register), #
ARMv8 (see ARM64)
array::from_fn, #
assembler, #
atomic barriers (see fences)
atomic fences (see fences)
atomic-wait crate, #
AtomicI8 (see atomic types)
AtomicI16 (see atomic types)
AtomicI32 (see atomic types)
AtomicI64 (see atomic types)
AtomicIsize (see atomic types)
AtomicU8 (see atomic types)
AtomicU16 (see atomic types)
AtomicU32 (see atomic types)
AtomicU64 (see atomic types)
AtomicUsize (see atomic types)
auto traits, #
B
b.ne (branch if not equal) instruction (ARM), #
barriers (see fences)
basics, #
binary semaphore, #
blocking, #
boolean (atomic) (see AtomicBool)
borrowing, #
btc (bit test and complement) instruction (x86), #
btr (bit test and reset) instruction (x86), #
bts (bit test and set) instruction (x86), #
building our own
busy-looping, #
- (see also spinning)
C
C standard library, #
- (see also libc)
cache miss, #
caching (processors), #
cargo-show-asm, #
cas (compare and swap) instruction (ARM), #
casa (compare and swap, acquire) instruction (ARM), #
casal (compare and swap, acquire and release) instruction (ARM), #
casl (compare and swap, release) instruction (ARM), #
cbnz (compare and branch on nonzero) instruction (ARM), #
Cell, #
- unsafe (see UnsafeCell)
channels
clrex (clear exclusive) instruction (ARM), #
cmp (compare) instruction (ARM), #
cmpxchg (compare and exchange) instruction (x86), #
#[cold], #
compare-and-exchange operations (atomic), #
- on ARM64, #
- caching, effect on, #
- compiler optimization, #
- example, ID allocation, #
- example, lazy initialization, #, #
- memory ordering, #
- using for channel state, #
- using for mutex state, #
- using for reader-writer lock state, #
- using on AtomicPtr, #
- using to lock reference counter, #
- weak, #
- on ARM64, #
- on x86-64, #
Compiler Explorer, #
compiler optimization
complex instruction set computer (CISC), #
concurrency, basics, #
condition variables, #
Condvar, #
- (see also condition variables)
consume memory ordering, #
consuming arguments by value, #
critical section (Windows), #
cyclic structures (Arc), #
D
dmb (data memory barrier) instruction (ARM), #
dword, #
E
--emit=asm (rustc), #
exclusive references, #
F
fair locks, #
false sharing, #
fetch-and-modify operations (atomic), #
fetch_store operation (atomic) (see swap operation)
fetch_update (atomic), #
FlushProcessWriteBuffers (Windows), #
forgetting (see leaking)
FreeBSD, umtx_op syscall, #
- (see also futex)
from_fn (array), #
futex, #
G
globally consistent order, #
- (see also sequentially consistent memory ordering)
Godbolt, #
good luck, #
H
hand, things getting out of, #
happens-before relationships, #
hint::spin_loop, #
I
ideas and inspiration, #
if let statement
- lifetime of temporaries, #
ignorance, blissful, #
immutable references, #
- (see also shared references)
indivisible, #
#[inline], #
inspiration, #
Instant, #
instruction reordering (see reordering)
instructions, #
Intel processors, #
invalidation queues, #
J
jne (jump if not equal) instruction (x86), #
join method, #
JoinGuard, #
JoinHandle, #
K
L
L1/L2/L3/L4 cache, #
label (assembly), #
lazy initialization
ldadd (load and add) instruction (ARM), #
ldadda (load and add, acquire) instruction (ARM), #
ldaddal (load and add, acquire and release) instruction (ARM), #
ldaddl (load and add, release) instruction (ARM), #
ldar (load-acquire register) instruction (ARM), #
ldaxr (load-acquire exclusive register) instruction (ARM), #
ldr (load register) instruction (ARM), #
ldxr (load exclusive register) instruction (ARM), #
“Leakpocalypse”, #
libpthread, #
- (see also pthreads)
linked list, #
Linux
load and store operations (atomic), #
lock poisoning, #
lock prefix (x86), #
lock_api crate, #
luck, good, #
M
machine code, #
machine instructions (see instructions)
main thread, #
ManuallyDrop, #
mem::forget, #
membarrier syscall, #
memory barriers (see fences)
memory fences (see fences)
memory model, #
memory ordering, #, #
- on ARM64, #
- compiler fence, #, #
- consume, #
- experiment, using relaxed instead of release and acquire, #
- fences, #, #, #
- happens-before relationship, #, #
- Miri, detecting problems with, #
- misconceptons about, #
- out-of-thin-air values, #
- at processor level, #
- reference counting, #, #, #, #, #
- relaxed, #, #
- release and acquire, #
- (see also release and acquire memory ordering)
- locking and unlocking, #
- sequentially consistent, #
- (see also sequentially consistent memory ordering)
- specifying using plain English, #
- total modification order, #, #, #, #
- on x86-64, #
MESI cache coherence protocol, #
MESIF cache coherence protocol, #
mfence (memory fence) instruction (x86), #
microinstructions, #
Miri, #
MOESI cache coherence protocol, #
mov (move) instruction (ARM), #
mov (move) instruction (x86), #
move closure, #
multi-copy atomicity, #
mutability, interior (see interior mutability)
mutable references, #
- (see also exclusive references)
mutexes, #
- building our own, #
- as container, #
- contention, #, #
- example, #
- fair, #
- happens-before relationship, #
- into_inner, #
- lifetime of mutex guard, #
- memory ordering, #
- Mutex type in Rust, #
- os_unfair_lock (macOS), #
- in other languages, #
- poisoning, #
- pthread
- wrapping in Rust, #
- pthread_mutex_t, #
- recursive, #
- robust, #
- Send requirement, #
- spin locks, #
- (see also spin locks)
- spinning, #, #
- using to build a channel, #
mutual exclusion (see mutexes)
N
name of a thread, #
NetBSD, futex support, #
- (see also futex)
NonNull, #
O
one-shot channels, #
OpenBSD, limited futex support, #
- (see also futex)
operating systems, #
optimization (see compiler optimization)
os_unfair_lock (macOS), #
other-multi-copy atomicity, #
out of order execution (see reordering)
out-of-thin-air values, #
output locking, #
overflows (atomic), #
overview of atomic instructions, #
P
panicking
parking (see thread parking)
parking lot-based locks, #
parking_lot crate, #
Pin, #
pipelining, #
poisoning, lock, #
println, use of output locking, #
priority inheritance, #
priority inversion, #
privacy (modules), #
process-wide memory barriers, #
processes, #
processor caching (see caching)
processor instructions (see instructions)
pthreads, #
Q
queue-based locks, #
R
racing, #
Rc, #
reader-writer locks, #
reduced instruction set computer (RISC), #
reference counting, #
- (see also Arc)
release and acquire memory ordering, #
#[repr(align)], #
ret (return) instruction (ARM), #
ret (return) instruction (x86), #
robust mutexes, #
rustup, #
RwLockReadGuard, #
RwLockWriteGuard, #
S
safety requirements of unsafe functions, #
scheduler, #
scoped threads, #
semaphores, #
SeqCst (see sequentially consistent memory ordering)
sequence locks, #
shadowing, #
spin locks
splitting (borrowing), #
stack size, #
static lifetime, #
statics, #
stlr (store-release register) instruction (ARM), #
stlxr (store-release exclusive register) instruction (ARM), #
stop flag, #
store buffers, #
store operations (atomic) (see load and store operations)
store-conditional (see load-linked/store-conditional)
str (store register) instruction (ARM), #
stress, reducing, #
strongly ordered architecture, #
stxr (store exclusive register) instruction (ARM), #
sub (subtract) instruction (x86), #
T
--target (rustc), #
teaching, #
thin air, out of, #
thread builder, #
thread name, #
ThreadId, #
thundering herd problem, #
time travel, #
U
uninitialized memory, #
unpark (Thread), #
unparking (see thread parking)
unsafe code, #
unsafe functions, #
unsafe trait implementation, #
unsound, #
V
VecDeque, #
W
waiting (see blocking)
WaitOnAddress (Windows), #
WakeByAddressAll (Windows), #
WakeByAddressSingle (Windows), #
Weak (see Arc; weak pointers)
Windows, #
windows crate, #
windows-sys crate, #
wrapping behavior (fetch_add and fetch_sub), #
- (see also overflows (atomic))
wrapping unmovable object in Box, #
write-through cache coherence protocol, #
X
x86-64 (processor architecture), #
x86-64 instructions
- add, #
- and, #
- btc (bit test and complement), #
- btr (bit test and reset), #
- bts (bit test and set), #
- cmpxchg (compare and exchange), #
- jne (jump if not equal), #
- lock prefix, #
- mfence (memory fence), #
- mov (move), #
- or, #, #
- overview, #
- ret (return), #
- sub (subtract), #
- xadd (exchange and add), #
- xchg (exchange), #, #
- xor, #
xadd (exchange and add) instruction (x86), #
xor instruction (x86), #